PART |
Description |
Maker |
74VHC11207 74VHC112MTCNL 74VHC112 |
Dual J-K Flip-Flops with Preset and Clear Dual J-K Flip-Flops with Preset and Clear AHC/VHC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
|
Fairchild Semiconductor, Corp.
|
ISL6293 ISL6293-2CR-T ISL6293-2CR ISL6293-2CRZ ISL |
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-SOIC -40 to 85 Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-PDIP -40 to 85 Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-SO -40 to 85 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO10 Li-ion/Li Polymer Battery Charger Accepting Two Power Sources
|
Intersil, Corp. INTERSIL[Intersil Corporation]
|
74LVX112M 74LVX112MTC 74LVX112 74LVX112SJX |
J-K-Type Flip-Flop Low Voltage Dual J-K Flip-Flops with Preset and Clear From old datasheet system
|
FAIRCHILD[Fairchild Semiconductor]
|
HD74HC73P HD74HC73FPEL HD74HC73RPEL |
Dual J-K Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
MC10135 MC10135FN MC10135L MC10135P ON0571 |
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CFP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CDIP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 Dual J-K Master-Slave Flip-Flop PIN ASSIGNMENT From old datasheet system
|
Motorola Mobility Holdings, Inc. Motorola, Inc. ONSEMI[ON Semiconductor]
|
AM27C64 AM27C64-120 AM27C64-120DC AM27C64-120DCB A |
64 Kilobit (8 K x 8-Bit) CMOS EPROM Octal D-Type Flip-Flops With Clock Enable 20-SOIC 0 to 70 Octal D-Type Flip-Flops With Clock Enable 20-SO 0 to 70 Cable Ties; Pack Quantity:100; Dual 4-Bit Decade Counters 16-PDIP 0 to 70 Dual 4-Bit Decade Counters 16-SOIC 0 to 70 Dual 4-Bit Binary Counters 14-SOIC 0 to 70 Dual 4-Bit Binary Counters 14-SO 0 to 70 Dual 4-Bit Binary Counters 14-PDIP 0 to 70 Quad 2-input positive-NAND buffers with open collector outputs 14-SOIC 0 to 70 Quad 2-input positive-NAND buffers with open collector outputs 14-SO 0 to 70 Quad 2-input positive-NAND buffers with open collector outputs 14-PDIP 0 to 70 Octal D-Type Flip-Flops With Clock Enable 20-PDIP 0 to 70 8K X 8 UVPROM, 150 ns, CDIP28 Hex D-Type Flip-Flops with Clock Enable 16-PDIP 0 to 70 8K X 8 UVPROM, 200 ns, CDIP28 Hex D-Type Flip-Flops with Clock Enable 16-SOIC 0 to 70 8K X 8 UVPROM, 200 ns, CDIP28 Quadruple 2-Input Multiplexers With Storage 16-SOIC 0 to 70 8K X 8 UVPROM, 90 ns, CDIP28 64 Kilobit (8 K x 8-Bit) CMOS EPROM 64千比特(8亩8位)CMOS存储 64 Kilobit (8 K x 8-Bit) CMOS EPROM 64千比特(8亩8位)的CMOS存储 Hex D-Type Flip-Flops with Clock Enable 16-SO 0 to 70 8K X 8 OTPROM, 200 ns, PQCC32
|
AMD[Advanced Micro Devices] Advanced Micro Devices, Inc. ADVANCED MICRO DEVICES INC
|
HD74HC76 HD74HC76FPEL HD74HC76P |
Dual J-K Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
HD74LVC74 |
Dual D-type Flip-Flops with Preset and Clear
|
Hitachi Semiconductor
|
HD74LVC74 |
Dual D-type Flip Flops with Preset and Clear
|
Hitachi Semiconductor
|
KS74AHCT112 |
Dual J-K Negative-Edge-Triggered Flip-Flops
|
Samsung
|
UT54ACS74 UT54ACTS74 |
Radiation-Hardened Dual D Flip-Flops with Clear & Preset
|
ETC
|